[2] Haile Yu, Philip H.W. Leong, and Qiang Xu. An FPGA chip identification generator using configurable ring oscillator. IEEE Transactions on VLSI Systems, 20(11):2198–2207, 2012.
[3] Mengxing Ouyang, W.J. Li, P.H.W. Leong, and Ka Wai Wong. Improving carbon nanotubes sensor time response and responsivity using constant-power activation. IEEE Transactions on Nanotechnology, 11(3):624–632, May 2012. (doi:10.1109/TNANO.2012.2188641)
[4] Roberto Cardu, Philip H.W. Leong, Craig T. Jin, and Alistair McEwan. Electrode contact impedance sensitivity to variations in geometry. Physiological Measurement, 33:817–830, 2012.
[5] Chenyu Wang, Jinman Kim, Craig T. Jin, Philip H. W. Leong, and Alistair McEwan. Near infrared spectroscopy in optical coherence tomography. Journal of Near Infrared Spectroscopy, 20:237–247, 2012.
[6] C.H. Ang, A.L. McEwan, A. van Schaik, C. Jin, and P.H.W. Leong. FPGA implementation of a biologically-inspired auto-associative memory. IEE Electronics Letters, 48(3):148–149, 2012.
[7] ChiWai Yu, Alistair M. Smith, Wayne Luk, Philip H.W. Leong, and Steven J.E. Wilton. Optimizing floating point units in hybrid FPGAs. IEEE Transactions on VLSI Systems, 20:1295–1303, 2012.
[8] Joydip Das, Andrew Lam, Steven J.E. Wilton, Philip Leong, and Wayne Luk. An analytical model relating FPGA architecture to logic density and depth. IEEE Transactions on VLSI Systems, 9(12):2229–2242, 2011.
[9] Yuet Ming Lam, J. Coutinho, Chun Hok Ho, Wayne Luk, and Philip H.W. Leong. Multi-loop parallelisation using unrolling and fission. International Journal of Reconfigurable Computing, 2010. Article ID 475620.
[10] Chun Hok Ho, Chi Wai Yu, Philip Leong, Wayne Luk, and Steven J.E. Wilton. Floating point FPGA: Architecture and modelling. IEEE Transactions on VLSI Systems, 17(12):1709–1719, 2009. In the top 25 downloaded manuscripts of the IEEE TVLSI journal, 2009 (http://tvlsi.eecs.northwestern.edu/top25_2009.htm).
[11] Chi Wai Yu, Julien Lamoureux, Steve Wilton, Philip Leong, and Wayne Luk. The coarse-grained / fine-grained logic interface in FPGAs with embedded floating-point arithmetic units. International Journal of Reconfigurable Computing, 2008, 2008. Article ID 736203.
[12] Steve J.E. Wilton, C.H. Ho, Brad Quinton, P.H.W. Leong, and Wayne Luk. A synthesizable datapath-oriented embedded FPGA fabric for silicon debug applications. ACM Transactions on Reconfigurable Technology and Systems, 1(1):7:1–7:25, March 2008.
[13] Brian M. H. Li and Philip H. W. Leong. Serial and parallel FPGA-based variable block size motion estimation processors. Journal of VLSI Signal Processing, 51(1):77–98, 2008. Special issue of selected FPT06 papers.
[14] David B. Thomas, Wayne Luk, Philip H.W. Leong, and John D. Villasenor. Gaussian random number generators. ACM Computing Surveys, 39(4):11:1–11:38, 2007.
[15] Mandy L. Y. Sin, Gary C. T. Chow, Gary M. K. Wong, Wen J. Li, Philip H. W. Leong, and Ka Wai Wong. Ultra-low-power alcohol vapor sensors using chemically functionalized multi-walled carbon nanotubes. IEEE Transactions on Nanotechnology, 6(5):571–577, September 2007.
[16] K.H. Tsoi, Ka Ho Leung, and Philip H.W. Leong. A high performance physical random number generator. IEE Proc. Computers & Digital Techniques, 1(4):349–352, July 2007.
[17] Steve C.L. Yuen, Johnny M.H. Lee, Wen J. Li, and Philip H.W. Leong. An AA-sized micro power generator and its application to a wireless sensor system. IEEE Pervasive Computing, 6(1):64–72, March 2006.
[18] D. Lee, J.D. Villasenor, W. Luk, and P.H.W. Leong. A hardware Gaussian noise generator using the Box-Muller method and its error analysis. IEEE Transactions on Computers, 55(6):659–671, June 2006.
[19] M.P. Leong, C.C. Cheung, C.W. Cheung, P.P.M. Wan, K.H. Leung, W.M.M. Yeung, W.S. Yuen, K.S.K. Chow, K.S. Leung, and P.H.W. Leong. A parallel library for financial engineering applications. IEEE Computer, 38(10):70–77, October 2005.
[20] Dong-U Lee, Wayne Luk, John D. Villasenor, Guanglie Zhang, and Philip H.W. Leong. A hardware Gaussian noise generator using the Wallace method. IEEE Transactions on VLSI Systems, 13(8):911–920, August 2005.
[21] Philip H.W. Leong, Ganglie Zhang, Dong-U Lee, Wayne Luk, and John D. Villasenor. A comment on the implementation of the Ziggurat method. Journal of Statistical Software, 12(7), 2005. http://www.jsatsoft.org.
[22] M.P. Leong, C.T. Jin, and P.H.W. Leong. An FPGA–based electronic cochlea. EURASIP Journal on Applied Signal Processing, 2003(7):629–638, 2003. Special issue on neuromorphic signal processing and implementations.
[23] M.P. Leong and P.H.W. Leong. A variable-radix digit-serial design methodology and its application to the discrete cosine transform. IEEE Transactions on VLSI Systems, 11(1):90–104, 2003.
[24] P.H.W. Leong and K.H. Leung. A microcoded elliptic curve processor using FPGA technology. IEEE Transactions on VLSI Systems, 10(5):550–559, 2002.
[25] Neil N. H. Ching, H. Y. Wong, Wen J. Li, Philip H. W. Leong, and Zhiyu Wen. A laser-micromachined multi-modal resonating power transducer for wireless sensing systems. Sensors and Actuators A: Physical, 97–98:685–690, 2002.
[26] P.H.W. Leong, C.W. Sham, W.C. Wong, H.Y. Wong, W.S. Yuen, and M.P. Leong. A bitstream reconfigurable FPGA implementation of the WSAT algorithm. IEEE Transactions on VLSI Systems, 9(1):197–201, 2001.
[27] W.J. Li, G.M.H. Chan, N.N.H. Ching, P.H.W. Leong, and H.Y. Wong. Dynamical modeling and simulation of a laser-micromachined vibration-based micro power generator. International Journal of Nonlinear Sciences and Simulation, 1:345–353, 2000.
[28] W. Chung, S. Carlile, and P. Leong. A performance adequate model for auditory localization. Journal of the Acoustical Society of America, 107(1):432–445, 2000.
[29] P.H.W. Leong and C.K. Chung. FPGA based runtime configurable clause evaluator for SAT problems. IEE Electronics Letters, 35(19):1618–1619, September 16, 1999.
[30] C.T. Jin, P.L. Rolandi, and P.H.W. Leong. Non–volatile programmable pulse computation cell. IEE Electronics Letters, 35(17):1413–1414, August 1999.
[31] P. Leong and S. Carlile. Methods for spherical data analysis and visualization. Journal of Neuroscience Methods, 80(2):191–200, 1998.
[32] S. Carlile, P. Leong, S. Hyams, and D. Pralong. The nature and distribution of errors in the localization of sounds in humans. Hearing Research, 114:179–196, 1997.
[33] P. H. W. Leong and M.A. Jabri. A low power VLSI arrhythmia classifier. IEEE Transactions on Neural Networks, 6(6):1435–1445, November 1995.
[34] P.H.W. Leong and M.A. Jabri. Kakadu - a low power analogue neural network classifier. International Journal of Neural Systems, pages 381–394, December 1993.
[35] M. Jabri, S. Pickard, P. Leong, and Y. Xie. Algorithms and implementation issues in analog low power learning neural network chips. International Journal on VLSI Signal Processing, 6(2):67–76, March 1993.
[36] P.H.W. Leong and M. Jabri. Matic - an intracardiac tachycardia classification system. Pacing and Clinical Electrophysiology (PACE), 15:1317–1331, September 1992.
[2] YiQiao Zhang, Thuraiappah Sathyan, Mark Hedley, Philip H.W. Leong, and Ahmed Pasha. Hardware efficient parallel particle filter for tracking in wireless networks. In IEEE 23rd International Symposium on Personal, Indoor and Mobile Radio Communications - (PIMRC), pages 1734–1739, 2012.
[3] Gary Chun Tak Chow, Wayne Luk, Philip Leong, and David Thomas. A mixed precision methodology for mathematical optimisation. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 33–36, 2012.
[4] Gary Chun Tak Chow, Qiwei Jin, Anson Hong Tak Tse, Wayne Luk, Philip Leong, and David Thomas. A mixed precision Monte Carlo methodology for reconfigurable accelerator systems. pages 57–66, 2012.
[5] Haile Yu, Qiang Xu, and Philip Heng Wai Leong. On timing yield improvement for FPGA designs using architectural symmetry. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 539–544, 2011.
[6] Colin Yu Lin, Hayden Kwok-Hay So, and Philip Heng Wai Leong. A model for matrix multiplication performance on FPGAs. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 305–310, 2011.
[7] Elaine Ou and Philip Leong. Emerging non-volatile memory technologies for reconfigurable architectures. In IEEE International Midwest Symposium on Circuits and Systems (Special Session on Reconfigurable Architecture), pages 1–4, 2011. Invited talk.
[8] Gary C.T. Chow, K.W. Kwok, Wayne Luk, and Philip H.W. Leong. Mixed precision comparison in reconfigurable systems. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 17–24, 2011.
[9] Jackson H.C. Yeung, Evangeline F.Y. Young, and Philip H.W. Leong. A Monte-Carlo floating point unit for self-validating arithmetic. pages 199–207, 2011.
[10] Haile Yu, Qiang Xu, and Philip H.W. Leong. Fine-grained characterization of process variation in FPGAs. In Proc. International Conference on Field Programmable Technology (FPT), pages 138–145, 2010.
[11] Haile Yu, Philip H.W. Leong, and Qiang Xu. An FPGA chip identification generator using configurable ring oscillator. In Proc. International Conference on Field Programmable Technology (FPT), pages 312–315 (poster), 2010.
[12] Kit Cheung, Simon R. Schultz, and Philip H.W. Leong. A parallel spiking neural network simulator. In Proc. International Conference on Field Programmable Technology (FPT), pages 247–254, 2009.
[13] Eddie Hung, Steven J. E. Wilton, Haile Yu, Thomas C. P. Chau, and Philip H.W. Leong. A detailed delay path model for FPGAs. In Proc. International Conference on Field Programmable Technology (FPT), pages 96–103, 2009.
[14] Steve Wilton, Philip Leong, and Wayne Luk. Modeling post-techmapping and post-clustering FPGA circuit depth. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 205–211, 2009.
[15] Haile Yu, P.H.W. Leong, H. Hinkelmann, L. Moller, M. Glesner, and P. Zipf. Towards a unique FPGA-based identification circuit using process variations. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 397–402, 2009.
[16] Thomas C. P. Chau, Sam M. H. Ho, Philip H.W. Leong, Peter Zipf, and Manfred Glesner. Generation of synthetic floating-point benchmark circuits. In Proc. International Symposium on Parallel and Distributed Processing (IPDPS), pages 1–9, 2009.
[17] Thomas C.P. Chau, Philip H.W. Leong, Sam M.H. Ho, Brian P.W. Chan, Steve C.L. Yuen, Kong-Pang Pun, and Oliver C.S. Choy. A comparison of via-programmable gate array logic cell circuits. pages 53–61, 2009.
[18] Y.M. Lam, J.G.F. Coutinho, W. Luk, and P. H. W. Leong. Optimising multi-loop programs for heterogeneous computing systems. In Proc. Southern Programmable Logic Conference (SPL), pages 129–134, 2009.
[19] Oskar Mencer, Kuen Hung Tsoi, Stephen Craimer, Timothy Todman, Wayne Luk, Ming Yee Wong, and Philip Heng Wai Leong. CUBE: A 512-FPGA cluster. In Proc. Southern Programmable Logic Conference (SPL), pages 51–57, 2009.
[20] Y.M. Lam, J.G.F. Coutinho, W. Luk, and P.H.W. Leong. Unrolling-based loop mapping and scheduling. In Proc. International Conference on Field Programmable Technology (FPT), pages 321–324, 2008.
[21] Y.M. Lam, J.G.F. Coutinho, W. Luk, and P.H.W. Leong. Mapping and scheduling with task clustering for heterogeneous computing systems. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 275–280, 2008.
[22] Haile Yu, Yuk Hei Chan, and Philip H.W. Leong. FPGA interconnect design using logical effort. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 447–450, 2008.
[23] Chun Hok Ho, Philip H.W. Leong, Wayne Luk, and Steve Wilton. Rapid estimation of power consumption for hybrid FPGAs. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 227–232, 2008. Stamatis Vassiliadis Award for Outstanding Paper.
[24] Andrew Lam, Steven J.E. Wilton, Philip Leong, and Wayne Luk. An analytical model describing the relationships between logic architecture and FPGA density. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 221–226, 2008.
[25] Jackson H.C. Yeung, C.C. Tsang, K.H. Tsoi, Bill S.H. Kwan, Chris C.C. Cheung, Anthony P.C. Chan, and Philip H.W. Leong. Map-reduce as a programming model for custom computing machines. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 149–159, 2008.
[26] Chi Wai Yu, Julien Lamoureux, Steven J.E. Wilton, Philip H.W. Leong, and Wayne Luk. The coarse-grained / fine-grained logic interface in FPGAs with embedded floating-point arithmetic units. In Proc. Southern Programmable Logic Conference (SPL), pages 63–68, 2008. Synplicity Best Ph.D. Student Paper Award.
[27] Philip H.W. Leong. Recent trends in FPGA architectures and applications. In Proc. 4th IEEE International Symposium on Electronic Design, Test and Applications, pages 137–141, 2008. Invited.
[28] Chun Hok Ho, Chi Wai Yu, Philip H.W. Leong, Wayne Luk, and Steve Wilton. Domain-specific hybrid FPGA: architecture and floating point applications. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 196–201, 2007. Stamatis Vassiliadis Award for Outstanding Paper.
[29] Steve J.E. Wilton, C.H. Ho, P.H.W. Leong, Wayne Luk, and Brad Quinton. A synthesizable datapath-oriented embedded FPGA fabric. pages 33–41, 2007.
[30] Brian M.H. Li and Philip H.W. Leong. FPGA-based MSB-first bit-serial variable block size motion estimation processor. In Proc. International Conference on Field Programmable Technology (FPT), pages 165–172, 2006.
[31] C.K. Wong and P.H.W. Leong. An FPGA-based electronic cochlea with dual fixed-point arithmetic. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 205–210, 2006.
[32] Kieron Turkington, Konstantinos Masselos, George A. Constantinides, and Philip Leong. FPGA based acceleration of the linpack benchmark: A high level code transformation approach. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 275–380, 2006.
[33] C.H. Ho, P.H.W. Leong, W. Luk, S.J.E. Wilton, and S. Lopez-Buedo. Virtual embedded blocks: A methodology for evaluating embedded elements in FPGA. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 35–44, 2006.
[34] Ocean Y. H. Cheung, Philip H. W. Leong, Eric K. C. Tsang, and Bertram E. Shi. A scalable FPGA implementation of cellular neural networks for Gabor-type filtering. In Proc. International Joint Conference on Neural Networks, pages 15–20, 2006.
[35] Yang Liu, Christos-Savvas Bouganis, Peter Y. K. Cheung, Philip H.W. Leong, and Stephen J. Motley. Hardware efficient architectures for eigenvalue computation. In Proc. Design automation and test in Europe (DATE), pages 953–958, 2006.
[36] Mandy L. Y. Sin, Gary C. T. Chow, Carmen K. M. Fung, Wen J. Li, Philip Leong, K. W. Wong, and Terry Lee. Ultra-low-power alcohol vapor sensors based on multi-walled carbon nanotube. In Proc. IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS), pages 1198 – 1202, 2006.
[37] G. L. Zhang, P. H. W. Leong, C. H. Ho, K. H. Tsoi, C. C. C. Cheung, D-U. Lee, R. C. C. Cheung, and W. Luk. Reconfigurable acceleration for monte carlo based financial simulation. In Proc. International Conference on Field Programmable Technology (FPT), pages 215–222, 2005.
[38] C.T. Chow, L.S.M. Tsui, P.H.W. Leong, W. Luk, and S. Wilton. Dynamic voltage scaling for commercial FPGA. In Proc. International Conference on Field Programmable Technology (FPT), pages 173–180, 2005. Best paper award.
[39] Ocean Y. H. Cheung, Philip H. W. Leong, Eric K. C. Tsang, and Bertram E. Shi. Implementation of Gabor-type filters on field programmable gate arrays. In Proc. International Conference on Field Programmable Technology (FPT), pages 327–328, 2005.
[40] P.H.W. Leong and K.H. Tsoi. Field programmable array technology for robotics applications. In IEEE International Conference on Robotics and Bioimetics (ROBIO), pages 295–298, July 2005.
[41] K.H. Tsoi and P.H.W. Leong. Mullet - a parallel multiplier generator. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 691–694, 2005.
[42] Guanglie Zhang, Dong-U Lee Philip H.W. Leong, John D. Villasenor, Ray C.C. Cheung, and Wayne Luk. Ziggurat-based hardware gaussian random number generator. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 275–280, 2005.
[43] C.K. Wong, K.K. Lo, and P.H.W. Leong. An FPGA-based othello endgame solver. In Proc. International Conference on Field Programmable Technology (FPT), pages 81–88, 2004.
[44] Ralf Ludewig, Oliver Soffke, Peter Zipf, Kong Pang Pun Manfred Glesner, Kuen Hung Tsoi, Kin Hong Lee, and Philip Leong. Ip generation for an FPGA-based audio dac sigma-delta converter. In Proc. International Conference on Field Programmable Logic and Applications (FPL), volume 3203 of LNCS, pages 526–535, 2004.
[45] K.H. Tsoi, C.H. Ho, H.C. Yeung, and P.H.W. Leong. An arithmetic library and its application to the N-body problem. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 68–78, 2004.
[46] S.C.L. Yuen, J.M.H. Lee, M.H.M. Luk, G.M.H. Chan, K.F. Lei, P.H.W. Leong, W.J. Li, and Y. Yeung. Aa size micro power conversion cell for wireless applications. In Fifth World Congress on Intelligent Control and Automation (WCICA), volume 6, pages 5629–5634, 2004.
[47] Ray C.C. Cheung, K.P. Pun, Steve C.L. Yuen, K.H. Tsoi, and Philip H.W. Leong. An FPGA-based re-configurable 24-bit 96khz sigma-delta audio dac. In Proc. International Conference on Field Programmable Technology (FPT), pages 110–117, 2003.
[48] S.H. Tang, K.S. Tsui, and P.H.W. Leong. Modular exponentiation using parallel multipliers. In Proc. International Conference on Field Programmable Technology (FPT), pages 52–59, 2003.
[49] C.H. Ho, K.H. Tsoi, H.C. Yeung, Y.M. Lam, P.H.W. Leong K.H. Lee, R. Ludewig, P. Zipf, A.G. Ortiz, and M. Glesner. Arbitrary function approximation in HDLs with application to the N-body problem. In Proc. International Conference on Field Programmable Technology (FPT), pages 84–91, 2003.
[50] C.W. Yu, K.H. Kwong, K.H. Lee, and P.H.W. Leong. A Smith-Waterman systolic cell. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 375–384, 2003.
[51] Y.M. Lam, M.W. Mak, and P.H.W. Leong. Fixed point implementations of speech recognition systems. In Proceedings of the International Signal Processing Conference GSPx, 2003.
[52] Johnny M. H. Lee, Steve C. L. Yuen, Wen J. Li, , and Philip H. W. Leong. Development of an aa-size energy transducer with micro resonators. In IEEE Int. Symp. on Circuit and Systems (ISCAS), volume 4, pages 876–879, May 2003.
[53] Stanley Y.C. Li, Gap C.K. Cheuk, K.H. Lee, and Philip H.W. Leong. FPGA-based SIMD processor. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 267–268, 2003.
[54] K.H. Tsoi, K.H. Leung, and P.H.W. Leong. Compact FPGA-based true and pseudo random number generators. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 51–61, 2003.
[55] D.K.Y. Tong, P.S. Lo, K.H. Lee, and P.H.W. Leong. A system level implementation of Rijndael on a memory-slot based FPGA card. In Proc. International Conference on Field Programmable Technology (FPT), pages 102–109, 2002.
[56] O.Y.H. Cheung and P.H.W. Leong. Implementation of an FPGA based accelerator for virtual private networks. In Proc. International Conference on Field Programmable Technology (FPT), pages 34–41, 2002.
[57] Kurt K. Ting, Steve C.L. Yuen, K. H. Lee, and Philip H.W. Leong. An FPGA based SHA-256 processor. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 577–585, 2002.
[58] C.H. Ho, P.H.W. Leong, K.H. Lee, K.H. Tsoi, R. Ludewig, P. Zipf, A.G. Ortiz, and M. Glesner. Fly – a modifiable hardware compiler. In Proc. International Conference on Field Programmable Logic and Applications (FPL), volume 2438 of LNCS, pages 381–390, 2002.
[59] C.H. Ho, M.P. Leong, P.H.W. Leong, J. Becker, and M. Glesner. Rapid prototyping of FPGA based floating point DSP systems. In Proc. IEEE International Workshop on Rapid System Prototyping (RSP), pages 19–24, 2002.
[60] K.H. Tsoi, K.H. Lee, and P.H.W. Leong. A massively parallel rc4 key search engine. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 13–21, 2002.
[61] M.P. Leong and P.H.W. Leong. A variable-radix digit-serial architecture. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2002.
[62] K.H. Tsoi, O.Y.H. Cheung, and P.H.W. Leong. A variable-radix systolic montgomery multiplier. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), 2002.
[63] Neil N. H. Ching, H. Y. Wong, Wen J. Li, Philip H. W. Leong, and Zhiyu Wen. A laser-micromachined multi-modal resonating power transducer for wireless sensing systems. In Proceedings of the 11th International Conference on Solid-State Sensors and Actuators (Transducers'01/Eurosensors XV), 2001.
[64] O.Y.H. Cheung, K.H. Tsoi, P.H.W. Leong, , and M.P. Leong. Tradeoffs in parallel and serial implementations of the international data encryption algorithm IDEA. In Proc. International Workshop on Cryptographic Hardware and Embedded Systems (CHES), pages 333–347, 2001.
[65] M.P. Leong, C.T. Jin, and P.H.W. Leong. Parameterized module generator for an FPGA–based electronic cochlea. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 21–30, 2001.
[66] P.H.W. Leong, M.P. Leong, O.Y.H. Cheung, T. Tung, C.M. Kwok, M.Y. Wong, and K.H. Lee. Pilchard - a reconfigurable computing platform with memory slot interface. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 170–179, 2001. Selected as one of the 25 most significant papers from the first 20 years of FCCM and will appear in an Association for Computing Machinery (ACM) special volume in 2013.
[67] C. Jin, P. Leong, J. Leung, A. Corderoy, and S. Carlile. Enabling individualized virtual auditory space using morphological measurements. In Proceedings of the First IEEE Pacific-Rim Conference on Multimedia (IEEE International Conference on Multimedia Information Processing), 2000.
[68] K.H. Leung, K.W. Ma, W.K. Wong, , and P.H.W. Leong. FPGA implementation of a microcoded elliptic curve cryptographic processor. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 68–76, 2000.
[69] M.P. Leong, O.Y.H. Cheung, K.H. Tsoi, , and P.H.W. Leong. A bit-serial implementation of the international data encryption algorithm IDEA. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 122–131, 2000.
[70] Wen J. Li, Philip H. W. Leong, Terry C. H. Hong, Hiu Yung Wong, and Gordon M. H. Chan. Infrared signal transmission by a laser-micromachined vibration-induced power generator. In Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems, pages 236–239, August 2000.
[71] W.J. Li, Z. Wen, P.K. Wong, G.M.H. Chan, and P.H.W. Leong. A micromachined vibration-induced power generator for low power sensors of robotic systems. In Proceedings of the World Automation Congress: 8th International Symposium on Robotics with Applications, 2000.
[72] Neil N. H. Ching, Gordon M. H. Chan, Wen J. Li, Hiu Yung Wong, and Philip H. W. Leong. Pcb-integrated micro-generator arrays for wireless systems. In Proceedings of the International Symposium on Smart Structures and Microsystems, 2000.
[73] H.Y. Wong, W.S. Yuen, K.H. Lee, and P.H.W. Leong. A runtime reconfigurable implementation of the gsat algorithm. In Proc. International Conference on Field Programmable Logic and Applications (FPL), pages 526–531, 1999.
[74] C.K. Chung and P.H.W. Leong. An architecture for solving boolean satisfiability using runtime configurable hardware. In Proceedings of the International Workshops on Parallel Processing, pages 352–357, 1999.
[75] P.H.W. Leong, Y.S. Moon, W.K. Sim, and D.W.P. Lam. Sound quality measurements in headphones. In Proceedings of the 106th Audio Engineering Society (AES) Convention, volume Preprint 4874(B6), 1999.
[76] P.K. Tsang, C.C. Cheung, K.H. Leung, T.K. Lee, , and P.H.W. Leong. An asynchronous forth microprocessor. In Proceedings of the IEEE Region 10 Conference (TENCON), pages 1079–1082, 1999.
[77] M.P. Leong, M.Y. Yeung, C.K. Yeung, C.W. Fu, P.A. Heng, and P.H.W. Leong. Automatic floating to fixed point translation and its application to post–rendering 3D warping. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 240–248, 1999.
[78] A.W.K. Sim, C.T. Jin, L.W. Chan, and P.H.W. Leong. A comparison of methods for clustering of electrophysiological multineuron recordings. In Proceedings of the International Conference of the IEEE Engineering in Medicine and Biology Society, volume 3, pages 1381–1384, 1998.
[79] T.K. Lee, P.H.W. Leong, K.H. Lee, K.T. Chan, S.K. Hui, H.K. Yeung, M.F. Lo, and J.H.M. Lee. An FPGA implementation of GENNET for solving graph coloring problems. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 284–285, 1998.
[80] P.H.W. Leong, P.K. Tsang, and T.K. Lee. A FPGA based forth microprocessor. In Proc. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), pages 254–255, 1998.
[81] C.T. Jin and P.H.W. Leong. An analogue VLSI time–encoded pattern classifier. In Proceedings of the Seventh Australian Conference on Neural Networks, pages 212–215, 2006.
[82] W. Chung, S. Carlile, and P. Leong. A computational model for auditory localization. In Proceedings of the Seventh Australian Conference on Neural Networks, pages 150–154, 1996.
[83] S. Carlile, P. Leong, S. Hyams, and D. Pralong. Distribution of errors in auditory localization. In Proceedings of the Australian Neuroscience Society Conference, page 225, 1996.
[84] S. Carlile, P. Leong, D. Pralong, R. Boden, and S. Hyams. High fidelity virtual auditory space: an operational definition. In Proceedings of the Simulation and Technology Training Conference (SimTecT96), pages 79–84, 1996.
[85] P. Leong, W. Chung, D. Pralong, and S. Carlile. A performance adequate computer model of human auditory localization. In British Journal of Audiology, 1996.
[86] K. K. Lai and P.H.W. Leong. Implementation of a time–multiplexed cnn building block cell. In Proceedings of the Microneuro Conference, pages 80–85, 1996.
[87] K. K. Lai and P. H. W. Leong. An area–efficient implementation of a cellular neural network. In Proceedings of the Second New Zealand International Two–Stream Conference on Artificial Neural Networks and Expert Systems, pages 51–54, 1995.
[88] K. K. Lai, P. H. W. Leong, and M. A. Jabri. Analogue cmos implementation of a cellular neural network. In Proceedings of the Sixth Australian Conference on Neural Networks, pages 17–20, 1995.
[89] M. A. Jabri, P. H. W. Leong, J. Burr, B. Flower, K. Lai, S. Pickard, E. Tinker, and R. Coggins. An analogue neural network using mcm technology. In Proceedings of the First New Zealand International Two–Stream Conference on Artificial Neural Networks and Expert Systems, pages 122–125, 1993.
[90] P. H. W. Leong and M. A. Jabri. A low power analogue neural network classifier chip. In Proceedings of the IEEE Custom Integrated Circuits Conference, pages pp. 4.5.1–4.5.4, 1993.
[91] M. A. Jabri, R. Coggins, E. Tinker, and P. Leong. Performance of learning algorithms for analog low power neural network chips. In Proceedings of the Neural Networks for Computing Conference, 1993.
[92] P. H. W. Leong and M.A. Jabri. Kakadu – a low power analogue neural network. In Proceedings of the Third International Conference on Microelectronics for Neural Networks, pages 207–216, 1993.
[93] P. H. W. Leong and M. A. Jabri. A VLSI arrhythmia classifier. In Proceedings of the Fourth Australian Conference on Neural Networks, pages 41–444, 1994.
[94] P. H. W. Leong and M.A. Jabri. An analogue low power VLSI neural network. In Proceedings of the International Joint Conference on Neural Networks, volume II-6, pages 78–83, 1992.
[95] P. H. W. Leong and M. A. Jabri. An analogue low power VLSI neural network. In Proceedings of the Third Australian Conference on Neural Networks, pages 147–150, 1992.
[96] M. Jabri, S. Pickard, P. Leong, B. Flower, and Y. Xie. ANN based classification of heart defibrillators. In Advances in Neural Information Processing Systems (NIPS) 4, pages 637–644, 1992.
[97] P. H. W. Leong and M. A. Jabri. Arrhythmia classification using two intracardiac leads. In Proceedings of Computers in Cardiology, pages 189–192, 1991.
[98] M.A. Jabri, S. Pickard, P. Leong, B. Flower, G. Rigby, and P. Henderson. VLSI implementation of neural networks with application to signal processing. In Proceedings of the IEEE International Symposium on Circuits and Systems, pages 1275–1278, 1991.
[99] P. H. W. Leong and M. A. Jabri. Connection topologies for digital neural networks. In Proceedings of the Second Australian Conference on Neural Networks, pages 34–37, 1991.
[100] P. H. W. Leong and C. Tham. Unix password encryption considered insecure. In Proceedings of the USENIX Technical Conference, pages 269–279, 1991.
[101] P. H. W. Leong. Implementation of a high performance multibit beamformer. In Proceedings of the International Symposium on Signal Processing and its Applications, pages 388–390, 1990.
[2] A. Kramer, R. Canegallo, M. Chinosi, G. Gozzini, P. Leong, P. L. Rolandi, and M. Sabatini. Voltage comparator with floating gate mos transistor. US Patent 6,014,044, January 11, 2000. SGS–Thomson Microelectronics S.r.l.
[3] A. Kramer, R. Canegallo, M. Chinosi, G. Gozzini, P. Leong, P. L. Rolandi, and M. Sabatini. Digital-to-analog current converter employing floating gate transistors. US Patent 5,990,816, September 30, 1997. SGS–Thomson Microelectronics S.r.l.
[4] P.H.W. Leong and M.A. Jabri. A method and system for automatically classifying intracardiac electrograms. US Patent 5,280,792, January 25, 1994. University of Sydney.
[2] C.K. Cheng, A.B. Kahng, and P.H.W. Leong. Reconfigurable computing. In J.G. Webster, editor, Encyclopedia of Electrical and Electronics Engineering. Wiley, 2007. http://www.mrw.interscience.wiley.com/emrw/9780471346081/eeee/article/W7603/current/html.
[3] C.W. Yu, K.H. Kwong, K.H. Lee, and P.H.W. Leong. A Smith-Waterman systolic cell. In Patrick Lysaght and Wolfgang Rosenstiel, editors, New Algorithms Architectures and Applications for Reconfigurable Computing, pages 291–300. Springer, 2003.
[4] P. Leong, T. Tucker, and S. Carlile. Digital signal processing for the auditory scientist: a tutorial introduction. In S. Carlile, editor, Virutal Auditory Space: Generation and Applications, pages 79–108. Landis Scientific, 1996.
[5] P. Leong. Kakadu – a low power analog VLSI multi–layer perceptron. In M. Jabri, R. Coggins, and B. Flower, editors, Adaptive Analog VLSI Neural Systems, pages 89–103. Chapman and Hall, 1995.
[6] M. Jabri, S. Pickard, P. Leong, Z. Chi, E. Tinker, and R. Coggins. Intra–cardiac electro–gram classification using artificial neural networks. In Neural Network Applications, pages 93–112. Kluwer Academic, 1994. A. Murray.
[7] Philip Leong. Arrhythmia classification using low power VLSI. PhD thesis, University of Sydney, 1992.
[2] P. Leong, A. Koch, and E. Boemo, editors. IET Computers & Digital Techniques Journal. 2007. Special issue on the 2006 Field Programmable Logic Conference.
[3] A. Koch, P. Leong, and E. Boemo, editors. Proceedings of the International Confernce on Field Programmable Logic and Applications, Madrid Spain. IEEE, 2006. IEEE Catalog Number: 06EX1349, ISBN: 1-4244-0312-X, Library of Congress: 2006922286.
[4] S. Wilton, T. Rissa, and P. Leong, editors. Proceedings of the International Confernce on Field Programmable Logic and Applications, Tampere Finland. IEEE, 2005. ISBN 0-7803-9362-7.
[5] P. Leong and M. Jabri, editors. Proceedings of the Third Australian Conference on Neural Networks (ACNN), Canberra. 1992.
[2] P. Leong. Low-cost reconfigurable computing (FPGAs). Slashdot, 2001. http://slashdot.org/hardware/01/11/04/1947212.shtml.
[3] P. Leong. Book review. EA Electrical Engineering Review, 1(3):34–35, 1995.
[4] P. Leong. Marlin on fly. (Australian) Modern Fishing Magazine, pages 50–53, 1994.
[5] P. Leong. Current source scrounges parts. EDN Magazine, page 182, June 6, 1991.