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Pulse-Triggered (Master-Slave) Flip-flops

The term pulse-triggered means that data are entered into the flip-flop on the rising edge of the clock pulse, but the output does not reflect the input state until the falling edge of the clock pulse.  As this kind of flip-flops are sensitive to any change of the input levels during the clock pulse is still HIGH, the inputs must be set up prior to the clock pulse's rising edge and must not be changed before the falling edge.  Otherwise, ambiguous results will happen.  

The three basic types of pulse-triggered flip-flops are S-R, J-K and D.  Their logic symbols are shown below.  Notice that they do not have the dynamic input indicator at the clock input but have postponed output symbols at the outputs.

Pulse-Triggered flip-flops

The truth tables for the above pulse-triggered flip-flops are all the same as that for the edge-triggered flip-flops, except for the way they are clocked.  These flip-flops are also called Master-Slave flip-flops simply because their internal construction are divided into two sections.  The slave section is basically the same as the master section except that it is clocked on the inverted clock pulse and is controlled by the outputs of the master section rather than by the external inputs.  The logic diagram for a basic master-slave S-R flip-flop is shown below.

S-R Master-Slave


Data Lock-Out Flip-flops

The data lock-out flip-flop is similar to the pulse-triggered (master-slave) flip-flop except it has a dynamic clock input.  The dynamic clock disables (locks out) the data inputs after the rising edge of the clock pulse.  Therefore, the inputs do not need to be held constant while the clock pulse is HIGH.  

The master section of this flip-flop is like an edge-triggered device.  The slave section becomes a pulse-triggered device to produce a postponed output on the falling edge of the clock pulse.

The logic symbols of S-R, J-K and D data lock-out flip-flops are shown below.  Notice they all have the dynamic input indicator as well as the postponed output symbol.

Data Lock-Out flip-flops

Again, the above data lock-out flip-flops have same the truth tables as that for the edge-triggered flip-flops, except for the way they are clocked.