Parallel In - Parallel Out
Shift Registers

For parallel in - parallel out shift registers, all data bits appear on the parallel outputs immediately following the simultaneous entry of the data bits.  The following circuit is a four-bit parallel in - parallel out shift register constructed by D flip-flops.

PIPO shift register

The D's are the parallel inputs and the Q's are the parallel outputs.  Once the register is clocked, all the data at the D inputs appear at the corresponding Q outputs simultaneously.