Design of Counters

This example is taken from M. M. Mano, Digital Design, Prentice Hall, 1984, p.243.

Example 1.6     Design a counter specified by the state diagram in Example 1.5 using T flip-flops. The state diagram is shown here again in Figure 22.

fig-18.gif (5027 bytes) Figure 22. State diagram of a 3-bit binary counter.

The state table will be the same as in Example 1.5.

Now derive the excitation table from the state table, which is shown in Table 17.

Table 17. Excitation table.

Output State Transitions

Flip-flop inputs

T2  T1  T0
Present State

Q2 Q1 Q0

Next State

Q2 Q1 Q0

0   0   0
0   0   1
0   1   0
0   1   1
1   0   0
1   0   1
1   1   0
1   1   1
0   0   1
0   1   0
0   1   1
1   0   0
1   0   1
1   1   0
1   1   1
0   0   0
0    0    1
0    1    1
0    0    1
1    1    1
0    0    1
0    1    1
0    0    1
1    1    1

Next step is to transfer the flip-flop input functions to Karnaugh maps to derive a simplified Boolean expressions, which is shown in Figure 23.

fig-23.gif (9767 bytes) Figure 23. Karnaugh maps

The following expressions are obtained:

T0 = 1;        T1 = Q0;         T2 = Q1*Q0

Finally, draw the logic diagram of the circuit from the expressions obtained. The complete logic diagram of the counter is shown in Figure 24.

fig-24.gif (2994 bytes) Figure 24. Logic diagram of 3-bit binary counter.

To see the timing and state transitions of the counter, click on this image.signal.gif (1039 bytes)

 

Now that you have reached the end of the tutorial, you should be able to understand the basic concept of sequential circuits. You should be able to analyse and design a basic sequential circuit. Now you can practice some of the exercises using the analysis and design procedures shown in the examples.

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